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  • TAGAMI Masayoshi ID: 9000004964746

    LSI Fundamental Research Laboratory, NEC Electronics Corporation (2010 from CiNii)

    Articles in CiNii:14

    • Evaluation of TaN Films by Power Swing Sputtering for MOCVD-Cu Damascene Interconnects (2000)
    • Reliability Improvement by Adopting Ti-barrier Metal for Porous Low-k ILD Structure (2007)
    • A Cost-Conscious 32nm CMOS Platform Technology with Advanced Single Exposure Lithography and Gate-First Metal Gate/High-K Process (2009)
  • TAGAMI Masayoshi ID: 9000016265752

    NEC Electronics Corporation (2007 from CiNii)

    Articles in CiNii:1

    • Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45nm CMOS Generation (2007)
  • TAGAMI Masayoshi ID: 9000107388883

    System Devices Research Laboratories, NEC Corporation (2004 from CiNii)

    Articles in CiNii:1

    • Mechanical Property Control of Low-k Dielectrics for Diminishing Chemical Mechanical Polishing (CMP)-Related Defects in Cu-Damascene Interconnects (2004)
  • Tagami Masayoshi ID: 9000025065818

    Articles in CiNii:1

    • Effects of Low-k Stack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure (2012)
  • Tagami Masayoshi ID: 9000401778235

    Articles in CiNii:1

    • Porous Low-kImpacts on Performance of Advanced LSI Devices with GHz Operations (2009)
  • Tagami Masayoshi ID: 9000401808551

    Articles in CiNii:1

    • Effects of Low-$k$ Stack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure (2012)
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