Search Results1-20 of  80

  • 1 / 4
  • TAKAGI NAOFUMI ID: 9000241439884

    Articles in CiNii:1

    • Partial Product Generation Utilizing the Sum of Operands for Reduced Area Parallel Multipliers (LSI Design Methodology Vol.4) (2011)
  • Naofumi Takagi ID: 9000404301988

    Articles in CiNii:1

    • A Generation Method of ECU-Hardware-Dependent Description of Complex Device Drivers in AUTOSAR (2018)
  • Naofumi Takagi ID: 9000404310040

    Articles in CiNii:1

    • Core State Aware Slack Gathering Scheduling for Embedded Real-Time Systems (2018)
  • Naofumi Takagi ID: 9000404310050

    Articles in CiNii:1

    • A motion planning method for mobile robot considering rotational motion in area coverage task (2018)
  • Naofumi Takagi ID: 9000406337133

    Articles in CiNii:1

    • mROS: A Lightweight Runtime Environment of ROS 1 nodes for Embedded Devices (2020)
  • TAKAGI Naofumi ID: 9000406367748

    Articles in CiNii:1

    • A Routing Method with Wire Length Matching for RSFQ Logic Circuits Using Thin PTLs (2020)
  • Takagi Naofumi ID: 9000406367852

    Articles in CiNii:1

    • A Comparison of Clocking Schemes for SFQ Circuits (2020)
  • Naofumi Takagi ID: 9000406401162

    Articles in CiNii:1

    • A functionality expansion of the lightweight runtime environment mROS for the user defined message types (2020)
  • Naofumi Takagi ID: 9000406401191

    Articles in CiNii:1

    • Supporting TOPPERS/ASP3 Kernel to mROS to Improve its Capability (2020)
  • TAKAGI NAOFUMI ID: 9000309984287

    Kyoto University (2014 from CiNii)

    Articles in CiNii:1

    • A Task Migration Method for Real-time Systems on Heterogeneous Multi-Cores with Single Instruction Set Architecture (2014)
  • TAKAGI Naofumi ID: 1000010171422

    Kyoto University (2016 from CiNii)

    Articles in CiNii:297

    • Hardware Algorithms for Arithmetic Circuits (2003)
    • Dedicated Circuit for Accelerating Permutation on Microprocessor (2003)
    • 並列計数法による高速ソ-ティング回路 (1982)
  • TAKAGI Naofumi ID: 9000001475786

    Department of Information Engineering, Nagoya University (2005 from CiNii)

    Articles in CiNii:1

    • Fast Modular Multiplication by Processing the Multiplier from Both Sides in Parallel (2005)
  • TAKAGI Naofumi ID: 9000004433065

    Department of Information Engineering, Nagoya University (1995 from CiNii)

    Articles in CiNii:1

    • On a Hardware Algorithm for Modular Division (1995)
  • TAKAGI Naofumi ID: 9000004792125

    the Department of Information Engineering, Nagoya University (1998 from CiNii)

    Articles in CiNii:1

    • A VLSI Algorithm for Modular Division Based on the Binary GCD Algorithm (1998)
  • TAKAGI Naofumi ID: 9000004798395

    Department of Information Engineering, Nagoya Univerity (2001 from CiNii)

    Articles in CiNii:1

    • A Digit-Recurrence Algorithm for Cube Rooting (2001)
  • TAKAGI Naofumi ID: 9000004799525

    The authors are with the Department of Information Engineering, Nagoya University (2002 from CiNii)

    Articles in CiNii:1

    • A VLSI Algorithm for Division in GF(2^m) Based on Extended Binary GCD Algorithm (2002)
  • TAKAGI Naofumi ID: 9000004801202

    Department of Information Engineering, Nagoya University (1995 from CiNii)

    Articles in CiNii:1

    • A Multiple-Precision Modular Multiplication Algorithm with Triangle Additions (1995)
  • TAKAGI Naofumi ID: 9000004802469

    Department of Information Engineering, Nagoya University (1996 from CiNii)

    Articles in CiNii:1

    • A Hardware Algorithm for Modular Division Based on the Extended Euclidean Algorithm (1996)
  • TAKAGI Naofumi ID: 9000004826749

    Department of Information Engineering, Nagoya University (2003 from CiNii)

    Articles in CiNii:1

    • Digit-Recurrence Algorithm for Computing Reciprocal Square-Root (2003)
  • TAKAGI Naofumi ID: 9000004849569

    Department of Information Engineering, Nagoya University (1999 from CiNii)

    Articles in CiNii:1

    • Minimum Cut Linear Arrangement of p-q Dags for VLSI Layout of Adder Trees (1999)
  • 1 / 4
Page Top