Search Results1-5 of  5

  • TAWADA Masashi ID: 9000017733251

    Articles in CiNii:77

    • A High-Speed Trace-Driven Cache Configuration Simulator for Dual-Core Processor L1 Caches (2013)
    • Data Structures Representing Multiple Cache Configurations and Its Associated Fast and Exact Two-core Cache Configuration Simulation (2012)
    • Exact, Fast and Flexible L1 Cache Configuration Simulation for Embedded Systems (LSI Design Methodology Vol.4) (2011)
  • TAWADA Masashi ID: 9000345194943

    Dept. of Computer Science and Communications Engineering, Waseda University (2016 from CiNii)

    Articles in CiNii:1

    • A Bit-Write-Reducing and Error-Correcting Code Generation Method by Clustering ECC Codewords for Non-Volatile Memories (2016)
  • TAWADA Masashi ID: 9000375888917

    Waseda Univ. (2017 from CiNii)

    Articles in CiNii:1

    • Proposal of pH-sensor device capable of operating only with NFC energy harvesting (2017)
  • TAWADA Masashi ID: 9000396112325

    Dept. of Computer Science and Communications Engineering, Waseda University (2018 from CiNii)

    Articles in CiNii:1

    • A Relaxed Bit-Write-Reducing and Error-Correcting Code for Non-Volatile Memories (2018)
  • TAWADA Masashi ID: 9000396112333

    Department of Computer Science and Communications Engineering, Waseda University (2018 from CiNii)

    Articles in CiNii:1

    • Stochastic Number Duplicators Based on Bit Re-Arrangement Using Randomized Bit Streams (2018)
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