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  • TSUJIMURA Tatsunori ID: 9000006251980

    Information Technology R&D Center, Mitsubishi Electric Corporation (2014 from CiNii)

    Articles in CiNii:13

    • Table-Network-Based FPGA Implementations of AES and Their Resistance Against Differential Power Analyses (2006)
    • Table-Network-Based FPGA Implementations of AES and Their Resistance Against Differential Power Analyses (2006)
    • B-7-40 An Architecture of the Multi-core CPU Encryption Device (2008)
  • TSUJIMURA Tatsunori ID: 9000018845092

    Information Technology R&D Center, Mitsubishi Electric Corporation (2011 from CiNii)

    Articles in CiNii:4

    • Proposal of the Communication between Slaves in FA Network (2010)
    • Proposal of the High-Throughput and Low-Latency DMA (2011)
    • Proposal of the High-Throughput and Low-Latency DMA (2011)
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