Search Results1-11 of  11

  • TAN Chuan Seng ID: 9000248242252

    Nanyang Technological University (2012 from CiNii)

    Articles in CiNii:1

    • Integration of Low-k Dielectric Liner in Through Silicon Via and Thermomechanical Stress Relief (2012)
  • Tan Chuan Seng ID: 9000401574612

    Articles in CiNii:1

    • Integration of Low-$\kappa$ Dielectric Liner in Through Silicon Via and Thermomechanical Stress Relief (2012)
  • Tan Chuan Seng ID: 9000401805080

    Articles in CiNii:1

    • Through Silicon Via Fabrication with Low-$\kappa$ Dielectric Liner and Its Implications on Parasitic Capacitance and Leakage Current (2012)
  • Tan Chuan Seng ID: 9000401810710

    Articles in CiNii:1

    • Vertical Silicon Nanowire Diode with Nickel Silicide Induced Dopant Segregation (2012)
  • Tan Chuan Seng ID: 9000401993518

    Articles in CiNii:1

    • Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process (2016)
  • Tan Chuan Seng ID: 9000402005948

    Articles in CiNii:1

    • Through Silicon Via Fabrication with Low-κ Dielectric Liner and Its Implications on Parasitic Capacitance and Leakage Current (2012)
  • Tan Chuan Seng ID: 9000402011567

    Articles in CiNii:1

    • Vertical Silicon Nanowire Diode with Nickel Silicide Induced Dopant Segregation (2012)
  • Tan Chuan Seng ID: 9000402027697

    Articles in CiNii:1

    • 2015-01-14 (2015)
  • Tan Chuan Seng ID: 9000402034876

    Articles in CiNii:1

    • Novel integration of ultrathin Al2O3with low-kdielectric as bilayer liner for capacitance optimization and stress mitigation in Cu through-silicon-via (2016)
  • Tan Chuan Seng ID: 9000402048594

    Articles in CiNii:1

    • Curvature evolution of 200 mm diameter GaN-on-insulator wafer fabricated through metalorganic chemical vapor deposition and bonding (2018)
  • Tan Chuan Seng ID: 9000402050278

    Articles in CiNii:1

    • Leakage current conduction mechanism of three-dimensional capacitors embedded in through-silicon vias (2018)
Page Top