Search Results1-14 of  14

  • YANAGIMACHI Shigeyuki ID: 9000004784457

    Green Platform Research Laboratories, NEC Corporation (2016 from CiNii)

    Articles in CiNii:20

    • Next Generation System Architecture - Generation Free Platform (2005)
    • Next Generation System Architecture - Generation Free Platform (2005)
    • An architecture of CIAO (Cut-In-Any Occasion) which makes a virtual private channel in a PHY layer of the Ethernet (2003)
  • YANAGIMACHI Shigeyuki ID: 9000004882936

    NEC Corporation (2003 from CiNii)

    Articles in CiNii:1

    • Tunability Benefit for a Hierarchical Waveband and Wavelength Cross-Connect Node (2003)
  • YANAGIMACHI Shigeyuki ID: 9000019021588

    System IP Core Research Laboratories, NEC (2011 from CiNii)

    Articles in CiNii:1

    • Recent Progress in High Speed and Low Power Interconnection Technology and Its Future Prospects (2011)
  • YANAGIMACHI Shigeyuki ID: 9000019115740

    NEC, Nano Electronics Research Laboratories (2009 from CiNii)

    Articles in CiNii:1

    • Low Power Consumption System Design with Optical Interconnection (2009)
  • YANAGIMACHI Shigeyuki ID: 9000107318779

    Photonics Electronics Technology Research Association (2012 from CiNii)

    Articles in CiNii:1

    • Technology Development for Energy Efficient Large Scale Edge Router : NEDO Project on "Next-generation High-efficiency Network Device" (2012)
  • Yanagimachi Shigeyuki ID: 9000003717870

    日本電気(株) (1994 from CiNii)

    Articles in CiNii:2

    • Analysis and Control of Settling Process of High-Speed, High-Precision Positioning Mechanism : 1st Report, Modeling and Computer Simulation (1994)
    • Analysis and Control of Settling Process of High-Speed, High-Precision Positioning Mechanism : 2nd Report, Application of Vibrationless Acceleration Control to Settling Process (1994)
  • Yanagimachi Shigeyuki ID: 9000017074891

    NEC System Platforms Research Laboratories (2004 from CiNii)

    Articles in CiNii:1

    • B-12-2 Method of link property configuration for hierarchical nodes (2004)
  • Yanagimachi Shigeyuki ID: 9000018431406

    System IP Core Research Laboratories NEC Corporation (2011 from CiNii)

    Articles in CiNii:1

    • C-12-49 Development of 25Gbps Laser Diode Driver in 90nm CMOS process (2011)
  • Yanagimachi Shigeyuki ID: 9000256263473

    Articles in CiNii:1

    • Analysis and Control of Settling Process of High-Speed, High-Precision Positioning Mechanism. 1st Report, Modeling and Computer Simulation. (1994)
  • Yanagimachi Shigeyuki ID: 9000256263888

    Articles in CiNii:1

    • Analysis and Control of Settling Process of High Speed, High-Precision Positioning Mechanism. 2nd Report. Application of Vibrationless Acceleration Control to Settling Process. (1994)
  • Yanagimachi Shigeyuki ID: 9000324991116

    NEC (2016 from CiNii)

    Articles in CiNii:1

    • B-10-66 400Gbps/ch Realtime Field Trial with Scalable Photonic Nodes in JGN-X Testbed (2016)
  • Yanagimachi Shigeyuki ID: 9000347144077

    Nec,Nano Electronics Research Laboratories (2010 from CiNii)

    Articles in CiNii:1

    • A study of three-dimensional integrated small optical module mounted directly on optical printed wiring board (2010)
  • Yanagimachi Shigeyuki ID: 9000347144286

    NEC (2011 from CiNii)

    Articles in CiNii:1

    • Activities of Optical interconnection roadmap working group in JIP (2011)
  • Yanagimachi Shigeyuki ID: 9000397686125

    NEC Corporation (2013 from CiNii)

    Articles in CiNii:1

    • Link loss budget evaluation of low cost parallel optical interconnection (2013)
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