Search Results1-20 of  29

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  • YOSHIHARA TSUTOMU ID: 9000004373145

    LSI R&D Laboratory, Mitsubishi Electric Corporation (1986 from CiNii)

    Articles in CiNii:1

    • Semiconductor Memories (1986)
  • YOSHIHARA Tsutomu ID: 9000004823830

    Articles in CiNii:4

    • Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh(Memory, <Special Section>Low-Power LSI and Low-Power IP) (2005)
    • Simulation of Thermal-Neutron-Induced Single-Event Upset Using Particle and Heavy-Ion Transport Code System (2007)
    • Dynamic Floating Body Control SOI CMOS for Power Managed Multimedia ULSIs (2001)
  • YOSHIHARA Tsutomu ID: 9000004842633

    Waseda University (2005 from CiNii)

    Articles in CiNii:1

    • Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories (2005)
  • YOSHIHARA Tsutomu ID: 9000005731064

    LSI Research & Development Laboratory (1983 from CiNii)

    Articles in CiNii:1

    • Soft Error Analysis of Fully Static MOS RAM : A-2: LSI-1 (1983)
  • YOSHIHARA Tsutomu ID: 9000018771906

    Graduate School of Information, Production and Systems, Waseda University (2011 from CiNii)

    Articles in CiNii:1

    • An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic (2011)
  • YOSHIHARA Tsutomu ID: 9000018821186

    Graduate School of Information, Production and System, Waseda University (2011 from CiNii)

    Articles in CiNii:1

    • An Area Efficiency Hybrid Decoupling Scheme for Charge Pump Noise Suppression in Non-volatile Memory (2011)
  • YOSHIHARA Tsutomu ID: 9000019142069

    Graduate School of Information, Production and System, Waseda University (2012 from CiNii)

    Articles in CiNii:1

    • An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme (2012)
  • YOSHIHARA Tsutomu ID: 9000021670988

    Graduate School of Information, Production and System, Waseda University (2012 from CiNii)

    Articles in CiNii:1

    • An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme (2012)
  • YOSHIHARA Tsutomu ID: 9000263066040

    the Graduate School of Information, Production and System, Waseda University (2013 from CiNii)

    Articles in CiNii:1

    • Self-Cascode MOSFET with a Self-Biased Body Effect for Ultra-Low-Power Voltage Reference Generator (2013)
  • YOSHIHARA Tsutomu ID: 9000314380796

    Graduate School of Information, Production and Systems, Waseda University (2016 from CiNii)

    Articles in CiNii:1

    • Design of a Sensorless Controller Synthesized by Robust H∞ Control for Boost Converters (2016)
  • Yoshihara Tsutomu ID: 9000258451144

    早大 (2004 from CiNii)

    Articles in CiNii:1

    • Self-Reference Sense Amplifier for MRAM(Magnetic-Random-Access-Memory) (2004)
  • Yoshihara Tsutomu ID: 9000258453091

    Waseda University (2005 from CiNii)

    Articles in CiNii:1

    • A Study of Dual Port Memory with a MRAM Memory Cell (2005)
  • Yoshihara Tsutomu ID: 9000258458456

    早大 (2009 from CiNii)

    Articles in CiNii:1

    • Group Count Code for NAND Flash Memory Considering Memory Error Characteristic (2009)
  • Yoshihara Tsutomu ID: 9000258458616

    早大 (2009 from CiNii)

    Articles in CiNii:1

    • Clock Amplitude Modulation to improve Charge Pump’s power integrity (2009)
  • Yoshihara Tsutomu ID: 9000258458620

    早大 (2009 from CiNii)

    Articles in CiNii:1

    • Active Decoupling Circuits for On Chip Power Supply Noise (2009)
  • Yoshihara Tsutomu ID: 9000272991775

    Graduate School of Information Production and Systems, Waseda University (2014 from CiNii)

    Articles in CiNii:1

    • A Novel Soft-Switching Modular Inverter for Photovoltaic PCU with High Efficiency and Reduced Size (2014)
  • Yoshihara Tsutomu ID: 9000283830255

    Waseda University (2008 from CiNii)

    Articles in CiNii:1

    • Examination of power supply amends circuit by on chip sampling (2008)
  • Yoshihara Tsutomu ID: 9000283830871

    Waseda University (2008 from CiNii)

    Articles in CiNii:1

    • A 0.8V constant g<sub>m</sub> input stage for rail-to-rail amplifier (2008)
  • Yoshihara Tsutomu ID: 9000283830885

    Waseda University (2008 from CiNii)

    Articles in CiNii:1

    • A New Four Phase PMOS Dickson Type Charge Pump with Threshold Voltage and Body Effect Cancellation Scheme (2008)
  • Yoshihara Tsutomu ID: 9000283832201

    早大 (2010 from CiNii)

    Articles in CiNii:1

    • A novel asymmetric charge recovery logic (2010)
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