CiNii Articles - Digitally-Controlled Oscillator (DCO)

1

All-digital half-rate referenceless CDR with single direction frequency sweep scheme using asymmetric binary phase detector

Yu Changzhi , Park Himchan , Huang Qiwei , Lee Daewung , Kim Hyunmook , Lee Hyunbae , Burm Jinwook

… Once the frequency of the digital controlled oscillator (DCO) enters the pull-in range of the CDR loop, the phase is automatically locked. …

IEICE Electronics Express 17(6), 20200024-20200024, 2020

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2

A STUDY OF SYNTHESIZABLE PHASE-LOCKED LOOP FOR CLOCK GENERATION

Yang Dongsheng , Yang Dongsheng

… Moreover, phase-interpolative coupled oscillator is proposed to reduce the phase mismatch and current output digital-to-analog converter (DAC) is utilized as the frequency coarse tuning without degrading the load balance. … To further improve the phase noise performance, a low-jitter mostly synthesized phase-locked loop based on injection-locking technique, with LC-based digitally controlled oscillator (DCO), is proposed. …

2017-03

IR
3

A 3.2-to-4.6 GHz fast-settling all-digital PLL with feed forward frequency presetting

Yang Tao , Min Hao , Yu Sichen , Han Huixiang , Liu Xiaolu , Pan Dashan , Tan Xi , Yan Na , Ye Fan , Wang Junyu

… Firstly, in this ADPLL, the wideband digitally controlled oscillator (DCO) is designed with a constant frequency step in the Coarse Mode to ensure constant loop bandwidth in the whole frequency range. … Secondly, a feed-forward presetting path between frequency command word (FCW) and oscillator tuning word in the Coarse Mode (OTW<sup>C</sup>) is utilized to accelerate the locking process for large frequency hopping steps. …

IEICE Electronics Express 14(2), 20161215-20161215, 2017

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4

A Low Power Coupling Shielded Digitally Controlled Oscillator (DCO)

Sang-Sun Yoo , Kang-Yoon Lee , Hyung-Joun Yoo

IEICE Proceeding Series (61), 315-317, 2016

DOI
5

A Subthreshold Ultra-Low Power Low-Voltage High Resolution DCO using Al Pad metal Layers for BLE Application in 55 nm Technology

Hamed Abbasizadeh , Seong-Jin Oh , Sang-Sun Yoo , Kang-Yoon Lee

IEICE Proceeding Series (61), 319-321, 2016

DOI
6

An Ultra-Low Power and High Resolution Digitally Controlled Oscillator with Gain Estimation Technique for Direct Modulation

Seong-Jin Oh , Hamed Abbasizadeh , Sang-Sun Yoo , Kang-Yoon Lee

IEICE Proceeding Series (61), 923-924, 2016

DOI
7

A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques

CHANG Chia-Wen , LO Kai-Yu , IBRAHIM Hossameldin A. , SU Ming-Chiuan , CHU Yuan-Hua , JOU Shyh-Jye

… This paper presents a varactor-based all-digital phase-locked loop (ADPLL) with a multi-phase digitally controlled oscillator (DCO) for near-threshold voltage operation. … In addition, a new all-digital reference spur suppression (RSS) circuit with multiple phases random-sampling techniques to effectively spread the reference clock frequency is proposed to randomize the synchronized DCO register behavior and reduce the reference spur. …

IEICE Transactions on Electronics E99.C(4), 481-490, 2016

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8

A 0.6-V 1.6-GHz 8-phase all digital PLL using multi-phase based TDC

Tu Yo-Hao , Liu Jen-Chieh , Cheng Kuo-Hsing , Huang Hong-Yi , Hu Chang-Chien

… The proposed multi-phase digitally controlled oscillator (MP-DCO) employs two sub-feedback loops at high operational frequencies. … With a low supply voltage, the DCO and the sense-amplifier based delay flip-flop (SA-DFF) use bulk-controlled techniques to improve the performance at high operational frequencies and setup/hold times, respectively. …

IEICE Electronics Express 13(2), 20150950-20150950, 2016

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9

A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator

BAE Jungnam , RADHAPURAM Saichandrateja , JO Ikkyun , KIHARA Takao , MATSUOKA Toshimasa

… We present a low-voltage digitally-controlled oscillator (DCO) with the third-order ΔΣ modulator utilized in the medical implant communication service (MICS) frequency band. … An optimized DCO core operating in the subthreshold region is designed, based on the gm/ID methodology. …

IEICE Transactions on Electronics E98.C(12), 1179-1186, 2015

IR J-STAGE
10

A Fast Settling All Digital PLL Using Temperature Compensated Oscillator Tuning Word Estimation Algorithm

OKUNO Keisuke , IZUMI Shintaro , MASAKI Kana , KAWAGUCHI Hiroshi , YOSHIMOTO Masahiko

… The proposed ADPLL employs a multi-phase digitally controlled oscillator (DCO). … In the proposed estimation method, the optimum oscillator tuning word (OTW) is estimated from the DCO frequency characteristic in the setup phase of ADPLL. …

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E98.A(12), 2592-2599, 2015

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11

A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications

CHANG Chia-Wen , CHU Yuan-Hua , JOU Shyh-Jye

… This paper presents a cell-based all-digital phase-locked loop (ADPLL) with hierarchical gated digitally controlled oscillator (G-DCO) for low voltage operation, wide frequency range as well as low-power consumption. … A hierarchical G-DCO is proposed to work at low supply voltage to reduce the power consumption and at the same time to achieve wide frequency range and precise frequency resolution. …

IEICE Transactions on Electronics E98.C(8), 882-891, 2015

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12

Flying-Adder Frequency Synthesizer with a Novel Counter-Based Randomization Method

CHEN Pao-Lung , LEE Da-Chen , LI Wei-Chia

This work presents a novel counter-based randomization method for use in a flying-adder frequency synthesizer with a cost-effective structure that can replace the fractional accumulator. The proposed …

IEICE Transactions on Electronics E98.C(6), 480-488, 2015

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13

An ultra-low-voltage power-supply monitor circuit for wireless-powered microparticle manipulation system [in Japanese]

CUI Ji , IWASAKI Hirosuke , DEI Yoshiaki , MATSUOKA Toshimasa

… 簡単化されたall digital phase-locked loop(ADPLL)であり,digitally controlled oscillator(DCO)の発振周波数の電源電圧依存性を利用して,電圧をデジタルコードに変換する.この電圧センサがすべてサブスレショルド領域で動作するため,μW級の消費電力を達成できる.また,低電圧でもリングオシレータに基づくDCOが安定動作できるようにするために,低電圧動作 …

Technical report of IEICE. ICD 113(419), 15-18, 2014-01-28
14

All-Digital RF Phase-Locked Loops Exploiting Phase Prediction

Zhuang Jingcheng , Staszewski Robert Bogdan

… In addition, the integer part, which counts the DCO clock edges, can be disabled to save power once the loop has achieved lock. …

IPSJ Transactions on System LSI Design Methodology 7(0), 2-15, 2014

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15

All-Digital RF Phase-Locked Loops Exploiting Phase Prediction

Zhuang Jingcheng , Staszewski Robert Bogdan

… In addition, the integer part, which counts the DCO clock edges, can be disabled to save power once the loop has achieved lock. …

Information and Media Technologies 9(1), 1-14, 2014

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16

Low Noise and Wide Tuning Range 15-bit Digitally Controlled CMOS Ring Oscillator with Quadrature Outputs Using Negative Resistance [in Japanese]

HASHIMURA Ryosuke , ANAND Awinash , POKHAREL Ramesh , KANEMOTO Daisuke , KANAYA Haruichi , RESISTANCE Regative

… 本論文では,15ビットのリング型DCO(Digitally Controlled Oscillator)の設計及び試作チップによる測定結果を報告する.LC型発振器に比べ,広い周波数可変範囲や小さなチップ面積という観点からリング型発振器が注目されているが,リング型発振器は位相雑音に弱いという欠点があった.今回,位相雑音を改善するため,アナログ制御方式に比べ大きな振幅を出力し,またフリッ …

The Transactions of the Institute of Electronics, Information and Communication Engineers. A 96(6), 370-376, 2013-06-01

References (8)
17

A ΔΣ-Modulator-Less Digitally-Controlled Oscillator using Fractional Capacitors for Cellular Transmitter

NAKAMURA Takahiro , NORIMATSU Takayasu , UOZUMI Toshiya , UEDA Keisuke , YAMAWAKI Taizo

… 65nm CMOSを用いたGSM/EDGE送信器用のデジタル制御発振回路(Digitally Controlled Oscillator)を開発した。 … 従来の△Σ変調器を用いずに高い周波数解像度を実現するため、分数容量を提案してDCOに適用した。 … また、DCO変換利得の微分非線形性(DNL)を低減するため、グランドシールド技術を提案し適用した。 …

IEICE technical report. Microwaves 112(459), 129-133, 2013-03-06
18

C-12-63 Alow-voltage digitally controlled oscillator with process-variation compensation [in Japanese]

Cui Ji , Murakami Toshimasa

Proceedings of the IEICE General Conference 2013年_エレクトロニクス(2), 134, 2013-03-05
19

Low Phase Noise 14-Bit Digitally Controlled CMOS Quadrature Ring Oscillator

POKHAREL Ramesh K. , NUGROHO Prapto , ANAND Awinash , TOMAR Abhishek , KANAYA Haruichi , YOSHIDA Keiji

… Furthermore, multiphase ring oscillator with a sub-feedback loop topology is used to obtain a stable quadrature outputs with even number of stages and to increase the output frequency. … The measured DCO has a frequency tuning range from 554MHz to 2.405GHz. … The FoM is -169.9dBc/Hz which is a 6.3dB improvement over the previous oscillator design. …

IEICE Transactions on Electronics 96(2), 262-269, 2013-02-01

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20

A counter-based all-digital spread-spectrum clock generator with high EMI reduction in 65nm CMOS

Chung Ching-Che , Sheng Duo , Ho Wei-Da

… An all-digital spread-spectrum clock generator (ADSSCG) with direct modulation on the digitally controlled oscillator (DCO) is presented. …

IEICE Electronics Express 10(6), 20130090-20130090, 2013

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