Search Results 1-20 of 2175

  • Rethinking the Rotation Invariance of Local Convolutional Features for Content-Based Image Retrieval

    ZHAO Longjiao , WANG Yu , KATO Jien

    … <p>Recently, local features computed using convolutional neural networks (CNNs) show good performance to image retrieval. … We end up a series of good practices with steady quantitative supports, which lead to the best strategy for computing LC features with high rotation invariance in image retrieval.</p> …

    IEICE Transactions on Information and Systems E104.D(1), 174-182, 2021

    J-STAGE 

  • DC-Balanced Improvement of Interlaken Protocol

    YOOWATTANA Sarat , EKPANYAPONG Mongkol

    … <p>High-speed serial data communication is essential for connecting peripherals in high-performance computing systems. … Interlaken is a high-speed serial data communication protocol that has been widely adopted in various applications as it can run on multiple medias such as PCBs, blackplans or over cables. …

    IEICE Transactions on Communications E104.B(1), 27-34, 2021

    J-STAGE 

  • Performance Evaluation of Parallel FPGA System for OpenCL Programming  [in Japanese]

    藤田 典久 , 小林 諒平 , 山口 佳樹 , 上野 知洋 , 佐野 健太郎 , 朴 泰祐

    … We have been proposing Communication Integrated Reconfigurable CompUting System (CIRCUS), which is an inter-FPGA communication framework. … In this paper, we describe the design and implementation of CIRCUS system and show the result of its performance evaluation on Cygnus. …

    情報処理学会論文誌コンピューティングシステム(ACS) 13(3), 13-28, 2020-11-12

    IPSJ 

  • Multi-Hybrid Accelerated Simulation by GPU and FPGA on Radiative Transfer Simulation in Astrophysics

    Ryohei Kobayashi , Norihisa Fujita , Yoshiki Yamaguchi , Taisuke Boku , Kohji Yoshikawa , Makito Abe , Masayuki Umemura

    … Field-programmable gate arrays (FPGAs) have garnered significant interest in research on high-performance computing because their computation and communication capabilities have drastically improved in recent years due to advances in semiconductor integration technologies that rely on Moore's Law. …

    情報処理学会論文誌コンピューティングシステム(ACS) 13(3), 2020-11-12

    IPSJ 

  • A Study of Routing-table Cache on HPC Switches  [in Japanese]

    平澤 将一 , 八巻 隼人 , 鯉渕 道紘

    … Parallel applications become sensitive to communication latencies of interconnection networks between compute nodes on HPC (High-Performance Computing) systems. … Our SimGrid simulation results show that the introduction of routing-table cache on each switch improves 6.9%, in average, of performance of NAS Parallel Benchmarks on 256-node interconnection networks. …

    情報処理学会論文誌コンピューティングシステム(ACS) 13(2), 1-12, 2020-09-17

    IPSJ 

  • Athena++ : A New Public MHD Code for Astrophysics  [in Japanese]

    富田 賢吾

    シミュレーション = Journal of the Japan Society for Simulation Technology 39(2), 75-84, 2020-06

  • Implementation of a Method for Simultaneous Estimation of Multiple Parameters and its Application to Machine Learning Software  [in Japanese]

    多部田 敏樹 , 藤井 昭宏 , 田中 輝雄 , 滝沢 寛之

    計算工学講演会論文集 Proceedings of the Conference on Computational Engineering and Science 25, 4p, 2020-06

  • The Effect of Silence Feature in Dimensional Speech Emotion Recognition

    Atmaja Bagus Tris , Akagi Masato

    … As the silence feature is extracted per utterance, we grouped the silence feature with high statistical functions from a set of acoustic features. … The proper choice of a factor in the calculation of silence feature improves the performance of dimensional speech emotion recognition performance in terms of a concordance correlation coefficient. … On the other side, improper choice of that factor leads to a decrease in performance by using the same architecture. …

    Proc. 10th International Conference on Speech Prosody 2020, 26-30, 2020-05-25

    IR 

  • Involved in Editing Information Processing After 2050:6. Perspective of Future High Performance Computing  [in Japanese]

    岩下 武史

    今後の30年間の情報処理技術に関する予測は,過去30年の外挿ではありえず,難しいものとなる.近年,ムーアの法則の終焉が取り上げられる中で,単位消費電力あたりの計算機性能の向上が困難となってきている様子が伺える.筆者は,短期的には「ショッピングモール型計算機」と自身が呼ぶ,特定の計算・処理に特化した計算デバイスと汎用型のCPUを併用した計算システムに関する諸技術が発展すると予測する.そして,その後, …

    情報処理 61(5), 451-452, 2020-04-15

    IPSJ 

  • 4D Street View : A New Visualization Method for Computer Simulations  [in Japanese]

    陰山 聡 , 坂本 尚久 , 大野 暢亮

    プラズマ・核融合学会誌 = Journal of plasma and fusion research 96(4), 199-206, 2020-04

  • Deep Learning in Cross-disciplinary  [in Japanese]

    孟 林 , 孟 澤林 , 王 志辰 , 冨山 宏之

    電気学会研究会資料. CT 2020(44-47・49-55), 5-10, 2020-03-27

  • Extreme-scale particle-based simulations on advanced HPC platforms

    Iwasawa M. , Namekata D. , Nomura K. , Tsubouchi M. , Makino J.

    … The basic idea of FDPS is to provide generic and high-performance library for these procedures. … Using these procedures, researchers or application programmers in various fields can write their programs without taking care of parallelization and performance tuning. … In order to make FDPS useful on advanced HPC platforms at present and in (near) future, we investigated its performance on several modern platforms and learned what can be the bottleneck. …

    CCF Transactions on High Performance Computing (2020), 183–195, 2020-02-19

    IR 

  • Accelerated FDPS: Algorithms to use accelerators with FDPS

    Iwasawa Masaki , Namekata Daisuke , Nitadori Keigo , Nomura Kentaro , Wang Long , Tsubouchi Miyuki , Makino Junichiro

    … We describe algorithms implemented in FDPS (Framework for Developing Particle Simulators) to make efficient use of accelerator hardware such as GPGPUs (general-purpose computing on graphics processing units). … We have developed FDPS to make it possible for researchers to develop their own high-performance parallel particle-based simulation programs without spending large amounts of time on parallelization and performance tuning. …

    Publications of the Astronomical Society of Japan 72(1), 13, 2020-02

    IR 

  • Towards Fault Tolerance Evaluation Techniques for Parallel Execution Frameworks That Consider Worker Significance  [in Japanese]

    西牟禮 亮 , 八杉 昌宏 , 平石 拓 , 馬谷 誠二

    High productivity, scalability, load balancing, and fault tolerance are all important issues of massively parallel computing. … In order to achieve high performance with parallel execution frameworks based on the HOPE model, it might be worthwhile to use several kinds of workers, e.g., a worker that serves as a base for information exchange among other normal workers. …

    情報処理学会論文誌プログラミング(PRO) 13(1), 16-16, 2020-01-29

    IPSJ 

  • Numerical evaluation of vortex-induced vibration amplitude of a box girder bridge using forced oscillation method

    Noguchi Kyohei , Ito Yasuaki , Yagi Tomomi

    … The development of high-performance computing has led to the use of computational fluid dynamics (CFD) in this domain, but the evaluation of VIV amplitude using the free vibration method in CFD incurs a high computational cost because of the small negative aerodynamic damping in the wind speed region of VIV. …

    Journal of Wind Engineering and Industrial Aerodynamics (196), 2020-01

    IR 

  • Classification of Smartphone Application Reviews Using Small Corpus Based on Bidirectional LSTM Transformer

    Matsumoto Kazuyuki , Tsuchiya Seiji , Kojima Takumi , Kondo Hiroya , Yoshida Minoru , Kita Kenji

    … We propose a high performance binary classification method (positive/negative) of review texts, which uses the bidirectional long short-term memory (biLSTM) self-attentional Transformer and is based on the distributed representations created by unsupervised learning of a manually labelled small review corpus, dictionary, and an unlabeled large review corpus. …

    International Journal of Machine Learning and Computing 10(1), 148-157, 2020-01

    IR 

  • Mobility Performance Enhancement in Small Cells Cluster of 5G Network: A Handover Overhead Reduction Approach

    Adeel Rafiq , Muhammad Afaq , Wang-Cheol Song

    IEICE Proceeding Series (62), 373-376, 2020

    DOI 

  • A Measurement Study on Evaluating Container Network Performance for Edge Computing

    Junghan Yoon , Jian Li , Sangho Shin

    IEICE Proceeding Series (62), 345-348, 2020

    DOI 

  • Design Method of Variable-Latency Circuit with Tunable Approximate Completion-Detection Mechanism

    UKON Yuta , SATO Shimpei , TAKAHASHI Atsushi

    … <p>Advanced information-processing services such as computer vision require a high-performance digital circuit to perform high-load processing at high speed. … To achieve high-speed processing, several image-processing applications use an approximate computing technique to reduce idle time of the circuit. …

    IEICE Transactions on Electronics, 2020

    J-STAGE 

  • Quantitative Phase-field Modeling and Simulations of Solidification Microstructures

    Ohno Munekazu

    … Recent achievements of large-scale simulations using high-performance computing techniques are explained. …

    ISIJ International 60(12), 2745-2754, 2020

    J-STAGE 

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