Signal Conditioning CMOS Circuits Integrated on Si (111) for Image-Recording Sensor of Neural Activity

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  • Kato Yoshiko
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology
  • Kawano Takeshi
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology
  • Ito Yoshiaki
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology
  • Takao Hidekuni
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology
  • Sawada Kazuaki
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology
  • Ishida Makoto
    Department of Electrical and Electronic Engineering, Toyohashi University of Technology

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An on-chip signal conditioning CMOS Integrated Circuit on Si (111) was fabricated for use in multi-point neural activity recording. The two-dimensional (2D) micro-Si probe array for neural activity recording sensor can be fabricated on the IC by Vapor-Liquid-Solid (VLS) growth method. However, the circuit has to be fabricated on Si (111) wafer because micro-Si probe is grown perpendicularly only on Si (111) wafer. Proper process conditions were established for fabrication of CMOS on Si (111). The circuits include 8×8 array of signal conditioning pixels with two 8-bit shift registers as 2D scanning circuits and a frequency divider. It is found from evaluated results of the fabricated circuits on Si (111) that CMOS circuits can be formed on Si (111) with enough performance. The output signal is detected from the selected pixel with the circuit. Increasing the potential at the selected pixel, the output signal increases in proportion to the potential. It has been confirmed that circuits on Si (111) are possible to be realized and available for image-recording sensor of neural activity.

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