Impact of Ti Deposition and Subsequent RTA Process on Contact Resistivity Characteristics of W-Bit Line in Sub-Micron Dynamic Random Access Memory
We have intensively investigated the impact of Titanium (Ti) deposition condition along with optimal Ti thickness and subsequent rapid thermal annealing (RTA) process on each contact resistivity (Rc) characteristics of W-bit line in sub-micron dynamic random access memory (DRAM) technology. We found out that low pressure (LP) Ti deposition method with a subsequent RTA temperature above critical value is very efficient to improve the uniformity of Ti deposited thickness inside the contact hole as well as to remove the agglomeration in the contact area of periphery n+ and p+ active regions, resulting in the dramatic Rc reduction with a good uniformity across a wafer. In addition, the optimized condition of Ti deposition and RTA process suitable to 0.15 μm DRAM and beyond is proposed to reduce W-bit line Rc of cell and periphery areas simultaneously, while still keeping the good electrical properties for other significant parameters such as junction leakage and data retention time.
- Japanese journal of applied physics. Pt. 1, Regular papers & short notes
Japanese journal of applied physics. Pt. 1, Regular papers & short notes 42(11), 6784-6789, 2003-11-15