Degradation Phenomenon of p+ to p+ Isolation Characteristics Caused by Carrier Injection in a High-Voltage Process

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著者

    • Kim Seong-Ho Kim Seong-Ho
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Jo Sung-Il Jo Sung-Il
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Park Joo-Han [他] Park Joo-Han
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Kim Sung-Hoan
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Kim Eun-Soo
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Kim Byung-Sun
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Lee Soo-Cheol
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea
    • Choi Chang-Sik
    • LSI Process Architecture, LSI Development Team, System-LSI Division, Samsung Electronics Co., Ltd, San#24, Nongseo-Lee, Kiheung-Eup, Yongin-Si, Kyungki-Do 449-900, Korea

抄録

In this study, an investigation for the degradation of p+ to p+ isolation characteristics in a high voltage process with shallow trench isolation was carried out. It could be explained that the degradation phenomenon was caused by carrier injection. In order to improve this, the results of p+ to p+ isolation degradation were determined under different ion implantation conditions and depths and widths of isolation. From these results, it was found that carrier injection mainly occurred at the sidewall of a trench, and the interface trap between Si3N4 and SiO2 was considered to be a dominant factor based on the result of degradation reduction with increasing thickness of sidewall oxide. Consequently, the improvement of the p+ to p+ isolation degradation caused by carrier injection could be achieved by optimizing the dose of a masked lightly doped drain and a field implantation energy.

収録刊行物

  • Japanese journal of applied physics. Pt. 1, Regular papers & short notes

    Japanese journal of applied physics. Pt. 1, Regular papers & short notes 42(11), 6815-6819, 2003-11-15

    公益社団法人 応用物理学会

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各種コード

  • NII論文ID(NAID)
    10012563793
  • NII書誌ID(NCID)
    AA10457675
  • 本文言語コード
    EN
  • 資料種別
    ART
  • 雑誌種別
    大学紀要
  • ISSN
    0021-4922
  • NDL 記事登録ID
    6752257
  • NDL 雑誌分類
    ZM35(科学技術--物理学)
  • NDL 請求記号
    Z53-A375
  • データ提供元
    CJP書誌  NDL  J-STAGE  JSAP 
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