FPGAによるハードウェアコントローラを用いたPWMインバータのマルチレートデッドビート制御 Multirate Deadbeat Control for PWM Inverter using FPGA based Hardware Controller

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A new approach for real time digital feedback control of PWM inverter is proposed, in which a deadbeat control combined with multirate control method is realized using FGPA (Field Programmable Gate Array) based hardware controller. Adopting the multirate deadbeat control, the sampling frequency of the inverter becomes half of the carrierfrequency, and the tracking error of the output voltage can be decreased. Also the FPGA based control hardware enables to realize almost ideal real time digital feedback controller because of its capability to realize very fast calculation of the control method within a few μ second. Design concept of the FPGA based hardware controller for PWM inverter is proposed, and experiments were carried out. Experimental result shows the ability of the FPGA based hardware controller, the inverter output voltage is coincident with the reference voltage in one sampling period without any compensation. <br>  From the view point of UPS applications, the advantages and the disadvantages are discussed through simulations and experiments, the superiority of the proposed control law is verified.

収録刊行物

  • 電気学会論文誌. D, 産業応用部門誌 = The transactions of the Institute of Electrical Engineers of Japan. D, A publication of Industry Applications Society

    電気学会論文誌. D, 産業応用部門誌 = The transactions of the Institute of Electrical Engineers of Japan. D, A publication of Industry Applications Society 124(4), 380-387, 2004-04-01

    一般社団法人 電気学会

参考文献:  15件中 1-15件 を表示

被引用文献:  9件中 1-9件 を表示

各種コード

  • NII論文ID(NAID)
    10012703906
  • NII書誌ID(NCID)
    AN10012320
  • 本文言語コード
    JPN
  • 資料種別
    ART
  • ISSN
    09136339
  • NDL 記事登録ID
    6909829
  • NDL 雑誌分類
    ZN31(科学技術--電気工学・電気機械工業)
  • NDL 請求記号
    Z16-1608
  • データ提供元
    CJP書誌  CJP引用  NDL  J-STAGE 
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