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- Funaki Tsuyoshi
- Department of Electrical Engineering, Kyoto University
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- Hikihara Takashi
- Department of Electrical Engineering, Kyoto University
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PLL is used to synchronize the phase of an inverter AC output with that of an utility AC. The dynamic PLL behavior must be accurately simulated for it governs the control performance of an inverter. The VCO part of a PLL conventionally consists of an integrator, which is reset at the instant when it exceeds 2π. A numerical simulation, such as an EMTP simulation, with a fixed time step calculation cannot detect these accurate reset timings. This inconsistency in reset timing induces a phase jitter. The phase error, due to jitter, becomes a severe problem when a large time step is employed to simulate long period phenomena, and the inverter is modeled by the state-space averaging method. This paper proposes a jitter less VCO model for EMTP simulation. The phase jitter of the proposed VCO model is completely suppressed, regardless of the time step length. The improvements are confirmed through EMTP simulations.
収録刊行物
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- 電気学会論文誌B(電力・エネルギー部門誌)
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電気学会論文誌B(電力・エネルギー部門誌) 124 (11), 1381-1382, 2004
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390001204602205568
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- NII論文ID
- 10013712974
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- NII書誌ID
- AN10136334
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- ISSN
- 13488147
- 03854213
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- 本文言語コード
- en
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- データソース種別
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- JaLC
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- CiNii Articles
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- 使用不可