A Jitter Less VCO Model in PLL for EMTP Simulation

• Funaki Tsuyoshi

  Department of Electrical Engineering, Kyoto University

• Hikihara Takashi

  Department of Electrical Engineering, Kyoto University

抄録

PLL is used to synchronize the phase of an inverter AC output with that of an utility AC. The dynamic PLL behavior must be accurately simulated for it governs the control performance of an inverter. The VCO part of a PLL conventionally consists of an integrator, which is reset at the instant when it exceeds 2π. A numerical simulation, such as an EMTP simulation, with a fixed time step calculation cannot detect these accurate reset timings. This inconsistency in reset timing induces a phase jitter. The phase error, due to jitter, becomes a severe problem when a large time step is employed to simulate long period phenomena, and the inverter is modeled by the state-space averaging method. This paper proposes a jitter less VCO model for EMTP simulation. The phase jitter of the proposed VCO model is completely suppressed, regardless of the time step length. The improvements are confirmed through EMTP simulations.

収録刊行物

• 電気学会論文誌Ｂ（電力・エネルギー部門誌）

  電気学会論文誌Ｂ（電力・エネルギー部門誌） 124 (11), 1381-1382, 2004

  一般社団法人 電気学会

キーワード

• ATP
• EMTP
• fixed time step
• phase jitter
• PLL
• VCO

詳細情報

• CRID: 1390001204602205568
• NII論文ID: 10013712974
• NII書誌ID: AN10136334
• DOI: 10.1541/ieejpes.124.1381
• ISSN: 13488147
• ISSN: 03854213
• Web Site: http://www.jstage.jst.go.jp/article/ieejpes/124/11/124_11_1381/_pdf
• 本文言語コード: en
• データソース種別:
  • JaLC
  • Crossref
  • CiNii Articles
• 抄録ライセンスフラグ: 使用不可