Architecture for High Speed Learning of Neural Network using Genetic Algorithm

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  • Yoshikawa Masaya
    Department of VLSI System Design, College of Science and Engineering, Ritsumeikan University
  • Terai Hidekazu
    Department of VLSI System Design, College of Science and Engineering, Ritsumeikan University

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  • 進化的手法による高速学習を実現する専用エンジンアーキテクチャ
  • シンカテキ シュホウ ニ ヨル コウソク ガクシュウ オ ジツゲン スル センヨウ エンジンアーキテクチャ

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Abstract

This paper discusses the architecture for high speed learning of Neural Network (NN) using Genetic Algorithm (GA). The proposed architecture prevents local minimum by using the GA characteristic of holding several individual populations for a population-based search and achieves high speed processing adopting dedicated hardware. To keep general purpose equal software processing, the proposed architecture can be flexible genetic operations on GA and is introduced both Sigmoid function and Heaviside function on NN. Furthermore, the proposed architecture is not optimized only the pipeline at evaluation phase on NN, but also optimized hierarchic pipelines on the whole at evolutionary phase. We have done the simulation, verification and logic synthesis using library of 0.35μm CMOS standard cell. Simulation results evaluating the proposed architecture show to achieve 22 times speed on average compared with software processing.

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