Electroplating Cu Filling Study for Thorough Electrode in Silicon Wafer of Three Dimensional LSI Chip Stacking
-
- TOMISAKA M.
- Electronic System Integration Technology Research Department, Association of Super-Advanced Electronic Technologies (ASET)
-
- YONEMURA H.
- Electronic System Integration Technology Research Department, Association of Super-Advanced Electronic Technologies (ASET)
-
- HOSHINO M.
- Electronic System Integration Technology Research Department, Association of Super-Advanced Electronic Technologies (ASET)
-
- TAKAHASHI K.
- Electronic System Integration Technology Research Department, Association of Super-Advanced Electronic Technologies (ASET)
この論文をさがす
収録刊行物
-
- Extended abstracts of the ... Conference on Solid State Devices and Materials
-
Extended abstracts of the ... Conference on Solid State Devices and Materials 2001 40-41, 2001-09-25
- Tweet
詳細情報 詳細情報について
-
- CRID
- 1573387449976783616
-
- NII論文ID
- 10015752200
-
- NII書誌ID
- AA10777858
-
- 本文言語コード
- en
-
- データソース種別
-
- CiNii Articles