A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition

• MURACHI Yuichiro

  Kobe University The Institute of Electronics, Information and Communication Engineers

• FUKUYAMA Yuki

  Kobe University The Institute of Electronics, Information and Communication Engineers

• YAMAMOTO Ryo

  Kobe University The Institute of Electronics, Information and Communication Engineers

• MIYAKOSHI Junichi

  Kobe University The Institute of Electronics, Information and Communication Engineers

• KAWAGUCHI Hiroshi

  Kobe University

• ISHIHARA Hajime

  Kanazawa University

• MIYAMA Masayuki

  Kanazawa University The Institute of Electronics, Information and Communication Engineers

• MATSUDA Yoshio

  Kanazawa University

• YOSHIMOTO Masahiko

  Kobe University The Institute of Electronics, Information and Communication Engineers

抄録

This paper describes an optical-flow processor core for real-time video recognition. The processor is based on the Pyramidal Lucas and Kanade (PLK) algorithm. It features a smaller chip area, higher pixel rate, and higher accuracy than conventional optical-flow processors. Introduction of search range limitation and the Carman filter to the original PLK algorithm improve the optical-flow accuracy, and reduce the processor hardware cost. Furthermore, window interleaving and window overlap methods reduces the necessary clock frequency of the processor by 70%, allowing low-power characteristics. We first verified the PLK algorithm and architecture with a proto-typed FPGA implementation. Then, we designed a VLSI processor that can handle a VGA 30-fps image sequence at a clock frequency of 332MHz. The core size and power consumption are estimated at 3.50×3.00mm² and 600mW, respectively, in a 90-nm process technology.

収録刊行物

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E91-C (4), 457-464, 2008

  一般社団法人 電子情報通信学会

キーワード

• optical flow
• real-time video recognition
• VLSI processor

詳細情報

• CRID: 1390282679352932608
• NII論文ID: 10026817372
• NII書誌ID: AA10826283
• DOI: 10.1093/ietele/e91-c.4.457
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E91.C/4/E91.C_4_457/_pdf
• 本文言語コード: en
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• 抄録ライセンスフラグ: 使用不可