Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

  • MURAKAMI Rui
    Department of Physical Electronics, Tokyo Institute of Technology
  • HARA Shoichi
    Department of Physical Electronics, Tokyo Institute of Technology
  • OKADA Kenichi
    Department of Physical Electronics, Tokyo Institute of Technology
  • MATSUZAWA Akira
    Department of Physical Electronics, Tokyo Institute of Technology

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In this paper we present a study on the design optimization of voltage-controlled oscillators. The phase noise of LC-type oscillators is basically limited by the quality factor of inductors. It has been experimentally shown that higher-Q inductors can be achieved at higher frequencies while the oscillation frequency is limited by parasitic capacitances. In this paper, the minimum transistor size and the degradation of the quality factor caused by a switched-capacitor array are analytically estimated, and the maximum oscillation frequency of VCOs is also derived from an equivalent circuit by considering parasitic capacitances. According to the analytical evaluation, the phase noise of a VCO using a 65nm CMOS is 2dB better than that of a 180nm CMOS.

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