直列形電圧補償装置のデッドタイム電圧とインピーダンス電圧の抑制法  [in Japanese] A Method for Reducing the Dead-Time Voltage and Impedance Voltage in a Series Voltage Compensator  [in Japanese]

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Author(s)

Abstract

Many research groups are developing series voltage compensators. In the series converter, since a transformer is used in series in the power system, the power system current flows into the voltage source inverter through the transformer. The inverter current, which is determined by the transformation ratio, gives rise to an error voltage that consists of a dead-time voltage and an impedance voltage; the error voltage is generated even when the reference voltage is zero. This paper describes the generation mechanism of the error voltage and proposes a method for reducing the error voltage.

Journal

  • IEEJ Transactions on Industry Applications

    IEEJ Transactions on Industry Applications 131(10), 1225-1231, 2011-10-01

    The Institute of Electrical Engineers of Japan

References:  17

Cited by:  2

Codes

  • NII Article ID (NAID)
    10030531197
  • NII NACSIS-CAT ID (NCID)
    AN10012320
  • Text Lang
    JPN
  • Article Type
    Journal Article
  • ISSN
    09136339
  • NDL Article ID
    11257730
  • NDL Source Classification
    ZN31(科学技術--電気工学・電気機械工業)
  • NDL Call No.
    Z16-1608
  • Data Source
    CJP  CJPref  NDL  J-STAGE 
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