Hybrid Wired/Wireless On-Chip Network Design for Application-Specific SoC

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著者

    • YIN Shouyi
    • the Institute of Microelectronics, Tsinghua University
    • HU Yang
    • the Institute of Microelectronics, Tsinghua University
    • ZHANG Zhen
    • the Institute of Microelectronics, Tsinghua University
    • LIU Leibo
    • the Institute of Microelectronics, Tsinghua University
    • WEI Shaojun
    • the Institute of Microelectronics, Tsinghua University

抄録

Hybrid wired/wireless on-chip network is a promising communication architecture for multi-/many-core SoC. For application-specific SoC design, it is important to design a dedicated on-chip network architecture according to the application-specific nature. In this paper, we propose a heuristic wireless link allocation algorithm for creating hybrid on-chip network architecture. The algorithm can eliminate the performance bottleneck by replacing multi-hop wired paths by high-bandwidth single-hop long-range wireless links. The simulation results show that the hybrid on-chip network designed by our algorithm improves the performance in terms of both communication delay and energy consumption significantly.

収録刊行物

  • IEICE transactions on electronics

    IEICE transactions on electronics 95(4), 495-505, 2012-04-01

    一般社団法人 電子情報通信学会

参考文献:  16件中 1-16件 を表示

各種コード

  • NII論文ID(NAID)
    10030940625
  • NII書誌ID(NCID)
    AA10826283
  • 本文言語コード
    ENG
  • 資料種別
    ART
  • ISSN
    09168524
  • データ提供元
    CJP書誌  J-STAGE 
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