Initialize and Weak-Program Erasing Scheme for High-Performance and High-Reliability Ferroelectric NAND Flash Solid-State Drive

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Initialize and weak-program erasing scheme is proposed to achieve high-performance and high-reliability Ferroelectric (Fe-) NAND flash solid-state drive (SSD). Bit-by-bit erase <i>V</i><sub>TH</sub> control is achieved by the proposed erasing scheme and history effects in Fe-NAND is also suppressed. History effects change the future erase <i>V</i><sub>TH</sub> shift characteristics by the past program voltage. The proposed erasing scheme decreases <i>V</i><sub>TH</sub> shift variation due to history effects from ±40% to ±2% and the erase <i>V</i><sub>TH</sub> distribution width is reduced from over 0.4V to 0.045V. As a result, the read and <i>V</i><sub>PASS</sub> disturbance decrease by 42% and 37%, respectively. The proposed erasing scheme is immune to <i>V</i><sub>TH</sub> variations and voltage stress. The proposed erasing scheme also suppresses the power and bandwidth degradation of SSD.

収録刊行物

  • IEICE transactions on electronics

    IEICE transactions on electronics 95(4), 609-616, 2012-04-01

    一般社団法人 電子情報通信学会

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各種コード

  • NII論文ID(NAID)
    10030940854
  • NII書誌ID(NCID)
    AA10826283
  • 本文言語コード
    ENG
  • 資料種別
    ART
  • ISSN
    09168524
  • データ提供元
    CJP書誌  J-STAGE 
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