3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern

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著者

    • YABE Hiroki
    • the Department of Electrical Engineering and Information Systems, The University of Tokyo
    • IKEDA Makoto
    • the Department of Electrical Engineering and Information Systems, The University of Tokyo

抄録

We present a 3-D range map acquisition system using a gray-encoded time-multiplexing structured pattern. In this method the only information needed to reconstruct 3-D range map is whether the pixel is bright or not for the exposed structured patterns. A dedicated image sensor to capture the pattern consists of pixel parallel 1-bit A/D converter, in-pixel pattern address memory and column parallel digital pattern address readout circuit. This in-pixel memory and digital bit-parallel pattern address readout eliminate unnecessary readout of pattern data to enhance 3-D acquisition speed. We fabricated the image sensor in 0.18µm CMOS and demonstrated up to 122 range map per second 3-D range map acquisition performance for 7 patterns with the average error of 3.2mm under the condition of 10% pattern recognition error.

収録刊行物

  • IEICE transactions on electronics

    IEICE transactions on electronics 95(4), 635-642, 2012-04-01

    一般社団法人 電子情報通信学会

参考文献:  15件中 1-15件 を表示

各種コード

  • NII論文ID(NAID)
    10030940886
  • NII書誌ID(NCID)
    AA10826283
  • 本文言語コード
    ENG
  • 資料種別
    ART
  • ISSN
    09168524
  • データ提供元
    CJP書誌  J-STAGE 
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