A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations

• FATHI Amir

  Microelectronic Research Laboratory of Urmia University

• AZIZIAN Sarkis

  Microelectronic Research Laboratory of Urmia University

• HADIDI Khayrollah

  Microelectronic Research Laboratory of Urmia University

• KHOEI Abdollah

  Microelectronic Research Laboratory of Urmia University

Abstract

A novel high speed 4-2 compressor using static and pass-transistor logic, has been designed in a 0.35µm CMOS technology. In order to reduce gate level delay and increase the speed, some changes are performed in truth table of conventional 4-2 compressor which leaded to the simplification of logic function for all parameters. Therefore, power dissipation is decreased. In addition, because of similar paths from all inputs to the outputs, the delays are the same. So there will be no need for extra buffers in low latency paths to equalize the delays.

Journal

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E95.C (4), 710-712, 2012

  The Institute of Electronics, Information and Communication Engineers

Keywords

• compressor
• low latency
• pass-transistor logic

Details

• CRID: 1390001204379453568
• NII Article ID: 10030941001
• NII Book ID: AA10826283
• DOI: 10.1587/transele.e95.c.710
• BIBCODE: 2012IEITE..95..710F
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E95.C/4/E95.C_4_710/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed