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- SHI Youhua
- Waseda University
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- TOGAWA Nozomu
- Waseda University
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- YANAGISAWA Masao
- Waseda University
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抄録
Scan-based side channel attack on hardware implementations of cryptographic algorithms has shown its great security threat. Unlike existing scan-based attacks, in our work we observed that instead of the secret-related-registers, some non-secret registers also carry the potential of being misused to help a hacker to retrieve secret keys. In this paper, we first present a scan-based side channel attack method on AES by making use of the round counter registers, which are not paid attention to in previous works, to show the potential security threat in designs with scan chains. And then we discussed the issues of secure DFT requirements and proposed a secure scan scheme to preserve all the advantages and simplicities of traditional scan test, while significantly improve the security with ignorable design overhead, for crypto hardware implementations.
収録刊行物
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- IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E95.A (12), 2338-2346, 2012
一般社団法人 電子情報通信学会
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詳細情報 詳細情報について
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- CRID
- 1390001206312006784
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- NII論文ID
- 10031161368
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- NII書誌ID
- AA10826239
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- ISSN
- 17451337
- 09168508
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- Crossref
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- KAKEN
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- 抄録ライセンスフラグ
- 使用不可