DLTS Evaluation of Near-Interface Traps in Ge-MIS Structures Fabricated by ECR-Plasma Techniques
-
- Okamoto Hiroshi
- Hirosaki University
-
- Narita Hidehumi
- Hirosaki University
-
- Sato Shinya
- Hirosaki University
-
- Iwasaki Takuro
- Hirosaki University
-
- Ono Toshiro
- Tokyo University of Science, Suwa
-
- Otani Yohei
- Tokyo University of Science, Suwa
-
- Fukuda Yukio
- Tokyo University of Science, Suwa
Bibliographic Information
- Other Title
-
- ECRプラズマ法によって作製したGe-MIS構造における界面近傍トラップのDLTS評価
- ECR プラズマホウ ニ ヨッテ サクセイ シタ Ge-MIS コウゾウ ニ オケル カイメン キンボウ トラップ ノ DLTS ヒョウカ
Search this article
Abstract
A Ge-MIS structure has attracted attention for the candidate of a next generation CMOS device. To date, we have successfully developed Ge-MIS structures with superior interface qualities by ECR (Electron Cyclotron Resonance) plasma techniques. In addition, we have shown that DLTS (Deep Level Transient Spectroscopy) method is useful for evaluating the Ge-MIS structures. In this report, we have evaluated the near-interface traps in GeNx/Ge structures by DLTS method, and have evaluated the effect of annealing on reducing the traps. The traps observed in the Ge-MIS samples were greatly reduced by 400°C annealing. The origins of the traps are also discussed by comparing with the traps in germanium reported to date.
Journal
-
- IEEJ Transactions on Electronics, Information and Systems
-
IEEJ Transactions on Electronics, Information and Systems 133 (8), 1481-1484, 2013
The Institute of Electrical Engineers of Japan
- Tweet
Keywords
Details 詳細情報について
-
- CRID
- 1390001204608773760
-
- NII Article ID
- 10031189039
-
- NII Book ID
- AN10065950
-
- ISSN
- 13488155
- 03854221
-
- NDL BIB ID
- 024846517
-
- Text Lang
- ja
-
- Data Source
-
- JaLC
- NDL
- Crossref
- CiNii Articles
- KAKEN
-
- Abstract License Flag
- Disallowed