Compact Optical Buffer Module for Intra-Packet Synchronization Based on InP 1×8 Switch and Silica-Based Delay Line Circuit

• KWACK Myung-Joon

  Research Center for Advanced Science and Technology, The University of Tokyo

• OYAMA Tomofumi

  Research Center for Advanced Science and Technology, The University of Tokyo

• HASHIZUME Yasuaki

  NTT Photonics Laboratories, NTT Corporation

• MINO Shinji

  NTT Photonics Laboratories, NTT Corporation

• ZAITSU Masaru

  Research Center for Advanced Science and Technology, The University of Tokyo

• TANEMURA Takuo

  Research Center for Advanced Science and Technology, The University of Tokyo

• NAKANO Yoshiaki

  Research Center for Advanced Science and Technology, The University of Tokyo

Abstract

Optical buffering has been one of the major technical challenges in realizing optical packet switching routers and interconnects. We demonstrate a compact optical buffer module, comprising an InP 1×8 phased-array switch and a silica-based delay line circuit. The integrated delay line circuit is fabricated on the silica-based planar-lightwave circuit (PLC) platform, and has the ladder architecture for reducing the size. In addition, variable optical couplers are integrated to achieve effective power equalization. Tunable and uniform buffering of up to 21ns is obtained with 3-ns temporal resolution.

Journal

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E96.C (5), 738-743, 2013

  The Institute of Electronics, Information and Communication Engineers

Keywords

• optical switch
• optical buffer
• integrated optical devices

Details

• CRID: 1390001204380021632
• NII Article ID: 10031193925
• NII Book ID: AA10826283
• DOI: 10.1587/transele.e96.c.738
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E96.C/5/E96.C_738/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed