MEMS素子のウエハレベル3次元積層技術

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  • Wafer Level Three-Dimensional Integration Technology for MEMS.
  • Wafer Level Three-Dimensional Integration Technilogy for MEMS

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Presumably the 21st century will see an advanced information society in which multimedia equipment is in common use. One of the basic technologies that support MEMS (Micro Electro Mechanical Systems), a new idea called “electronic systems integration”for practical application of an integrated block in which many different elements including not only electronic circuits but also sensors and actuators are combined, using Si wafers as basic elements. With today's MEMS, the problems of suppressing delay in signal transmission and heat generation are highlighted, and intensive investigations are being conducted on such methods as three-dimensional packaging to miniaturize low-resistance Cu trenches (Damascene) and low-permittivity layer insulation films and wires. The problem with waferlevel three-dimensional packaging is how to carry out wiring between upper and lower wafers at the time of stacking. In the past practice, stacked wafers were connected through inner bumps formed on the through-hole interconnections. However, the bumps had to be polished to make them uniform in height because they were difficult to form with a uniform height. In order to solve this problem, we developed a technology of wiring wafers to each other by the molten metal suction method after stacking them in several layers in the three-dimensional direction, i.e., we succeeded in connecting wafers without bumps. The purpose of the present paper is to introduce this technology.

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