A VLSI Algorithm for Division in GF(2^m) Based on Extended Binary GCD Algorithm

• WATANABE Yasuaki

  Department of Information Engineering, Nagoya University

• TAKAGI Naofumi

  Department of Information Engineering, Nagoya University

• TAKAGI Kazuyoshi

  Department of Information Engineering, Nagoya University

抄録

A VLSI algorithm for division in GF(2^m ) with the canonical basis representation is proposed. It is based on the extended Binary GCD algorithm for GF(2^m ) and performs division through iteration of simple operations, such as shifts and bitwise exclusive-OR operations. A divider in GF(2^m ) based on the algorithm has a linear array structure with a bit-slice feature and carries out division in 2m clock cycles. The amount of hardware of the divider is proportional to m and the depth is a constant independent of m.

収録刊行物

• IEICE transactions on fundamentals of electronics, communications and computer sciences

  IEICE transactions on fundamentals of electronics, communications and computer sciences 85 (5), 994-999, 2002-05-01

  一般社団法人電子情報通信学会

キーワード

• finite field arithmetic
• division in finite field
• hardware algorithm
• VLSI algorithm

詳細情報

• CRID: 1574231877100484352
• NII論文ID: 110003209115
• NII書誌ID: AA10826239
• ISSN: 09168508
• 本文言語コード: en
• データソース種別:
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