NAND Gate for SFQ Logic Circuits

• MYOREN Hiroaki

  Faculty of Engineering, Saitama University

• ONO Seiichiro

  Faculty of Engineering, Saitama University

• TAKADA Susumu

  Faculty of Engineering, Saitama University

抄録

We propose a universal NAND logic gate based on single flux quantum(SFQ) logic.The NAND gate enables the construction of any logic circuits.In the proposed gate, three superconducting loops share two Josephson junctions(JJs).The critical currents of the JJs were designed to allow each of any two loops to trap an SFQ at the same time.We simulated dynamic operation of this NAND gate.The results show that the NAND gate can operate with a delay time of 45 ps, and the power consumption of this circuit is close to 0.06μW / gate.

収録刊行物

• IEICE transactions on electronics

  IEICE transactions on electronics 83 (1), 81-84, 2000-01-25

  一般社団法人電子情報通信学会

キーワード

• NAND gate
• universal gate
• single flux quantum logic

詳細情報

• CRID: 1573387452278214784
• NII論文ID: 110003211779
• NII書誌ID: AA10826283
• ISSN: 09168524
• 本文言語コード: en
• データソース種別:
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