Self-Reconfigurable Multi-Layer Neural Networks with Genetic Algorithms

• SUGAWARA, Eiko

• FUKUSHI, Masaru

• HORIGUCHI, Susumu

Abstract

This paper addresses the issue of reconfiguring multi-layer neural networks implemented in single or multiple VLSI chips. The ability to adaptively reconfigure network configuration for a given application, considering the presence of faulty neurons, is a very valuable feature in a large scale neural network. In addition, it has become necessary to achieve systems that can automatically reconfigure a network and acquire optimal weights without any help from host computers. However, self-reconfigurable architectures for neural networks have not been studied sufficiently. In this paper, we propose an architecture for a self-reconfigurable multi-layer neural network employing both reconfiguration with spare neurons and weight training by GAs. This proposal offers the combined advantages of low hardware overhead for adding spare neurons and fast weight training time. To show the possibility of self-reconfigurable neural networks, the prototype system has been implemented on a field programmable gate array.

identifier:https://dspace.jaist.ac.jp/dspace/handle/10119/4701

Journal

• IEICE TRANSACTIONS on Information and Systems

  IEICE TRANSACTIONS on Information and Systems E87-D (8), 2021-2028, 2004-08-01

  電子情報通信学会

Keywords

• self-reconfiguration
• multi-layer neural network
• weight training by genetic algorithm
• FPGA

Details

• CRID: 1050001337537158528
• NII Article ID: 110003214093
• NII Book ID: AA10826272
• ISSN: 09168532
• Web Site: http://hdl.handle.net/10119/4701
• Text Lang: en
• Article Type: journal article
• Data Source:
  • IRDB
  • CiNii Articles