A 0.6V Supply, Voltage-Reference Circuit Based on Threshold-Voltage-Summation Architecture in Fully-Depleted CMOS/SOI

• UGAJIN Mamoru

  NTT Telecommunications Energy Laboratories

• SUZUKI Kenji

  NTT Telecommunications Energy Laboratories

• TSUKAHARA Tsuneo

  NTT Telecommunications Energy Laboratories

抄録

A low-voltage silicon-on-insulator (SOI) voltage-reference circuit has been developed. It is based on threshold-voltage-summation architecture and the output is not affected by the input offset of the feedback amplifier. Thus, the output dispersion is considerably reduced. An undoped MOSFET is used as a depletion-mode transistor because of its small threshold voltage. The temperature dependence of normal and undoped MOSFETs in fully depleted CMOS/SOI technology is studied for designing a temperature-insensitive voltage-reference circuit. A prototype circuit, fabricated on a fully depleted CMOS/SIMOX process, has a measured reference voltage of 530 ± 16.8mV (3σ), and can operate at a supply voltage as low as 0.6 V. The measured temperature coefficient is 0.02 ± 0.06 mV/℃ (3σ).

収録刊行物

• IEICE transactions on electronics

  IEICE transactions on electronics 85 (8), 1588-1595, 2002-08-01

  一般社団法人電子情報通信学会

キーワード

• voltage reference
• CMOS
• low voltage
• SOI

詳細情報

• CRID: 1570854177340433280
• NII論文ID: 110003221021
• NII書誌ID: AA10826283
• ISSN: 09168524
• 本文言語コード: en
• データソース種別:
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