A Cost-Effective Handshake Protocol and Its Implementation for Bundled-Data Asynchronous Circuits

• SHIMIZU Masakazu

  Department of Computer Science, The University of Electro-Communications

• ABE Koki

  Department of Computer Science, The University of Electro-Communications

Abstract

We propose and implement a four-phase handshake protocol for bundled-data asynchronous circuits with consideration given to power consumption and area. A key aspect is that our protocol uses three phases for generating the matched delay to signal the completion of the data-path stage operation whereas conventional methods use only one phase. A comparison with other protocols at 0.18μm process showed that our protocol realized lower power consumption than any other protocol at cycle times of 1.2 ns or more. The area of the delay generator required for a given data-path delay was less than half that of other protocols. The overhead of the timing generator was the same as or less than that of other protocols.

Journal

• IEICE transactions on fundamentals of electronics, communications and computer sciences

  IEICE transactions on fundamentals of electronics, communications and computer sciences 89 (1), 280-287, 2006-01-01

  The Institute of Electronics, Information and Communication Engineers

Keywords

• asynchronous circuits
• bundled-data style
• handshake protocols
• low power

Details

• CRID: 1571698602409251712
• NII Article ID: 110003486136
• NII Book ID: AA10826239
• ISSN: 09168508
• Text Lang: en
• Data Source:
  • CiNii Articles