An Adaptive Dynamic Extensible Processor

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Author(s)

    • Noori Hamid NOORI Hamid
    • Department of Informatics, Graduate School of Information Science and Electrical Engineering, Kyushu University
    • Inoue Koji INOUE Koji
    • Department of Informatics, Graduate School of Information Science and Electrical Engineering, Kyushu University

Abstract

This paper describes an approach for adaptive dynamic instruction set extension, tuning processors to specific applications. These new instructions are generated after production. The processor has two modes : training mode and normal mode. The application-specific instructions are extracted from the critical portions of the code detected by a profiler at training mode. At normal mode they are executed on a reconfigurable coarse grain accelerator. The sequencer decides when, which custom instruction should be executed. In this methodology there is no need to a new compiler and extra opcodes. Two methods are proposed for finding critical regions of the code.

Journal

  • IEICE technical report

    IEICE technical report 105(453), 13-18, 2005-12-02

    The Institute of Electronics, Information and Communication Engineers

References:  6

Codes

  • NII Article ID (NAID)
    110003486812
  • NII NACSIS-CAT ID (NCID)
    AN10013141
  • Text Lang
    ENG
  • Article Type
    ART
  • ISSN
    09135685
  • NDL Article ID
    7767245
  • NDL Source Classification
    ZN33(科学技術--電気工学・電気機械工業--電子工学・電気通信)
  • NDL Call No.
    Z16-940
  • Data Source
    CJP  NDL  NII-ELS 
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