Fabrication of Self-Aligned Aluminum Gate Polysilicon Thin-Film Transistors Using Low-Temperature Crystallization Process.

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  • Ohno Eizo
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632
  • Yoshinouchi Atsushi
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632
  • Hosoda Takeshi
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632
  • Itoh Masataka
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632
  • Morita Tatsuo
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632
  • Tsuchimoto Shuhei
    Central Research Laboratories, Sharp Corporation, 2613–1 Ichinomoto–cho, Tenri, Nara 632

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The performance of scanning driver circuits fabricated with self-aligned aluminum gate polysilicon thin-film transistors (TFT's) is demonstrated. After the gate electrode patterning, the fabrication process temperature is kept below 400° C to enable the use of aluminum gate electrodes. The low-temperature crystallization phenomenon, which occurs when protons are implanted simultaneously with boron or phosphorus dopants, is employed to eliminate the 600° C activation-annealing process. A maximum clock frequency of about 2.0 MHz is achieved when the driver operating voltage is 24 V and the TFT channel length is 12 µ m.

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