FPGA implementation of a stereo matching processor based on window-parallel-and-pixel-parallel architecture
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Abstract
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学術論文 (Article)
科研費報告書収録論文(課題番号:17300009/研究代表者:亀山充隆/システムインテグレーション理論に基づく高安全知能自動車用VLSIの最適設計)
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Journal
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- 48th Midwest Symposium on Circuits and Systems, 2005
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48th Midwest Symposium on Circuits and Systems, 2005 2 1219-1222, 2005
Institute of Electrical and Electronics Engineers
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Details 詳細情報について
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- CRID
- 1050282677705640320
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- NII Article ID
- 110004019457
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- NII Book ID
- AA10826239
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- HANDLE
- 10097/40033
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- Text Lang
- en
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- Article Type
- journal article
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- Data Source
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- IRDB
- CiNii Articles