Initial Study of a Phase-Aware Scheduling for Hardware Transactional Memory

• Tomoki, Tajimi

• Anju, Hirota

• Ryota, Shioya

• Masahiro, Goshima

• Tomoaki, Tsumura

抄録

Victoria, B.C., Canada, 21-23 August 2017

収録刊行物

• 2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)

  2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM) 1-6, 2017

  IEEE

詳細情報

• CRID: 1050001201676568960
• NII論文ID: 120006705826
• DOI: 10.1109/pacrim.2017.8121912
• Web Site: http://id.nii.ac.jp/1476/00006404/
• Web Site: http://xplorestaging.ieee.org/ielx7/8116603/8121873/08121912.pdf?arnumber=8121912
• 本文言語コード: en
• 資料種別: conference paper
• データソース種別:
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  • CiNii Articles
  • KAKEN