Fast frame memory access method for H.264/AVC

• Song Tian

  Computer Systems Engineering, Department of Institute of Technology and Science, Graduate School of Engineering, Tokushima University

• Kishida Tomoyuki

  Department of Electrical and Electronic Engineering, Graduate School of Engineering, Tokushima University

• Shimamoto Takashi

  Computer Systems Engineering, Department of Institute of Technology and Science, Graduate School of Engineering, Tokushima University

抄録

This paper presents an efficient memory access interface architecture for H.264/AVC encoder. In the implementation of H.264/AVC encoder, the bandwidth compression of frame memory becomes a challenging issue due to some bandwidth intensive coding tools, such as multiple frames motion estimation, deblocking filter and INTRA mode decision. In this work, by analyzing the memory access patterns of each coding function module of H.264/AVC, an efficient memory access method for the Direct Memory Access (DMA) module is proposed. The proposed method carefully designed an efficient memory mapping method to decrease the memory response delay. Simulation results show that over 50% memory access cycles can be saved by using proposed method.

収録刊行物

• IEICE Electronics Express

  IEICE Electronics Express 5 (9), 344-348, 2008

  一般社団法人 電子情報通信学会

キーワード

• H.264/AVC
• VLSI
• SDRAM
• bandwidth compression

詳細情報

• CRID: 1390282680189865088
• NII論文ID: 130000087193
• DOI: 10.1587/elex.5.344
• ISSN: 13492543
• Web Site: http://www.jstage.jst.go.jp/article/elex/5/9/5_9_344/_pdf
• 本文言語コード: en
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