Reduction of Base-Collector Capacitance in InP/InGaAs DHBT with Buried SiO<sub>2</sub> Wires
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- TAKEBE Naoaki
- Department of Physical Electronics, Tokyo Institute of Technology
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- MIYAMOTO Yasuyuki
- Department of Physical Electronics, Tokyo Institute of Technology
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In this paper, we report the reduction in the base-collector capacitance (CBC) of InP/InGaAs double heterojunction bipolar transistors with buried SiO2 wires (BG-HBT). In a previous trial, we could not confirm a clear difference between the CBC of the conventional HBT and that of the BG-HBT because the subcollector layer was thicker than expected. In this study, the interface between the collector and the subcollector was shifted to the middle of the SiO2 wires by adjusting the growth temperature, and a reduction in CBC with buried SiO2 wires was confirmed. The estimated CBC of the BG-HBT was 7.6fF, while that of the conventional HBT was 8.6fF. This 12% reduction was in agreement with the 10% reduction calculated according to the designed size.
収録刊行物
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- IEICE Transactions on Electronics
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IEICE Transactions on Electronics E95.C (5), 917-920, 2012
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詳細情報 詳細情報について
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- CRID
- 1390282679354503936
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- NII論文ID
- 10030941590
- 130002135544
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- NII書誌ID
- AA10826283
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- BIBCODE
- 2012IEITE..95..917T
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- ISSN
- 17451353
- 09168524
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- 本文言語コード
- en
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- データソース種別
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- JaLC
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