FPGA Implementation of Human Detection by HOG Features with AdaBoost

• DOHI Keisuke

  Department of Science and Technology, Graduate School of Engineering, Nagasaki University

• NEGI Kazuhiro

  Department of Science and Technology, Graduate School of Engineering, Nagasaki University

• SHIBATA Yuichiro

  Division of Electrical Engineering and Computer Science, Graduate School of Engineering, Nagasaki University

• OGURI Kiyoshi

  Division of Electrical Engineering and Computer Science, Graduate School of Engineering, Nagasaki University

Abstract

We implement external memory-free deep pipelined FPGA implementation including HOG feature extraction and AdaBoost classification. To construct our design by compact FPGA, we introduce some simplifications of the algorithm and aggressive use of stream oriented architectures. We present comparison results between our simplified fixed-point scheme and an original floating-point scheme in terms of quality of results, and the results suggest the negative impact of the simplified scheme for hardware implementation is limited. We empirically show that, our system is able to detect human from 640×480 VGA images at up to 112FPS on a Xilinx Virtex-5 XC5VLX50 FPGA.

Journal

• IEICE Transactions on Information and Systems

  IEICE Transactions on Information and Systems E96.D (8), 1676-1684, 2013

  The Institute of Electronics, Information and Communication Engineers

Keywords

• histogram of oriented gradients
• AdaBoost
• human detection
• FPGA

Details

• CRID: 1390001204377980032
• NII Article ID: 130003370949
• DOI: 10.1587/transinf.e96.d.1676
• ISSN: 17451361
• ISSN: 09168532
• Web Site: https://www.jstage.jst.go.jp/article/transinf/E96.D/8/E96.D_1676/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed