Multilane Hashing Mode Suitable for Parallel Processing

• KUWAKADO Hidenori

  Faculty of Informatics, Kansai University

• HIROSE Shoichi

  Graduate School of Engineering, University of Fukui

抄録

A hash function is an important primitive for cryptographic protocols. Since algorithms of well-known hash functions are almost serial, it seems difficult to take full advantage of recent multi-core processors. This paper proposes a multilane hashing (MLH) mode that achieves both of high parallelism and high security. The MLH mode is designed in such a way that the processing speed is almost linear in the number of processors. Since the MLH mode exploits an existing hash function as a black box, it is applicable to any hash function. The bound on the indifferentiability of the MLH mode from a random oracle is beyond the birthday bound on the output length of an underlying primitive.

収録刊行物

• IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E96.A (12), 2434-2442, 2013

  一般社団法人 電子情報通信学会

キーワード

• hash function
• mode of operations
• parallel processing
• indifferentiability

詳細情報

• CRID: 1390282681288977408
• NII論文ID: 130003385293
• NII書誌ID: AA10826239
• DOI: 10.1587/transfun.e96.a.2434
• ISSN: 17451337
• ISSN: 09168508
• NDL書誌ID: 025050968
• Web Site: https://ndlsearch.ndl.go.jp/books/R000000004-I025050968
• Web Site: https://www.jstage.jst.go.jp/article/transfun/E96.A/12/E96.A_2434/_pdf
• 本文言語コード: en
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