A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation
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- KAMAE Norihiro
- Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
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- TSUCHIYA Akira
- Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
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- ONODERA Hidetoshi
- Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University CREST, JST
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A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.
収録刊行物
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- IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E97.A (3), 734-740, 2014
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詳細情報 詳細情報について
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- CRID
- 1390282681286721280
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- NII論文ID
- 40019997257
- 130003394776
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- NII書誌ID
- AA10826239
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- ISSN
- 17451337
- 09168508
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- NDL書誌ID
- 025304427
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- NDL
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- 使用不可