High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding

• IIJIMA Yosuke

  Oyama National College of Technology

• TAKADA Yuuki

  Graduate School of Engineering, Gunma University

• YUMINAKA Yasushi

  Faculty of Science and Technology, Gunma University

抄録

The data rate of VLSI interconnections has been increasing according to the demand for high-speed operation of semiconductors such as CPUs. To realize high performance VLSI systems, high-speed data communication has become an important factor. However, at high-speed data rates, it is difficult to achieve accurate communication without bit errors because of inter-symbol interference (ISI). This paper presents high-speed data communication techniques for VLSI systems using Tomlinson-Harashima Precoding (THP). Since THP can eliminate the ISI with limiting average and peak power of transmitter signaling, THP is suitable for implementing advanced low-voltage VLSI systems. In this paper, 4-PAM (Pulse amplitude modulation) with THP has been employed to achieve high-speed data communication in VLSI systems. Simulation results show that THP can remove the ISI without increasing peak and average power of a transmitter. Moreover, simulation results clarify that multiple-valued data communication is very effective to reduce implementation costs for realizing high-speed serial links.

収録刊行物

• IEICE Transactions on Information and Systems

  IEICE Transactions on Information and Systems E97.D (9), 2296-2303, 2014

  一般社団法人 電子情報通信学会

キーワード

• high-speed interface
• Tomlinson-Harashima precoding (THP)
• intersymbol interference
• multiple-valued signaling
• low-voltage VLSI systems

詳細情報

• CRID: 1390001204379631232
• NII論文ID: 130004685471
• DOI: 10.1587/transinf.2013lop0021
• ISSN: 17451361
• ISSN: 09168532
• Web Site: https://www.jstage.jst.go.jp/article/transinf/E97.D/9/E97.D_2013LOP0021/_pdf
• 本文言語コード: en
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