50�GHz demonstration of an integer-type butterfly processing circuit for an FFT processor using the 10kA/cm2 nb process

• SAKASHITA Yosuke

  Yokohama National University

• YAMANASHI Yuki

  Yokohama National University

• YOSHIKAWA Nobuyuki

  Yokohama National University

書誌事項

タイトル別名

• 50 GHz Demonstration of an Integer-Type Butterfly Processing Circuit for an FFT Processor Using the 10 kA/cm<SUP>2</SUP> Nb Process

抄録

We are developing a fast Fourier transform (FFT) processor using high-speed and low-power single-flux-quantum (SFQ) circuits. Our main concern is the development of an SFQ butterfly processing circuit, which is the core processing circuit in the FFT processor. In our previous study, we have confirmed the complete operation of an integer-type butterfly processing circuit using the AIST 2.5 kA/cm² Nb standard process at the frequency of 25 GHz. In this study, we have designed an integer-type butterfly processing circuit using the AIST 10 kA/cm² Nb advanced process and confirmed its high-speed operation at the maximum frequency of 50 GHz.

収録刊行物

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E98.C (3), 232-237, 2015

  一般社団法人 電子情報通信学会

キーワード

• SFQ circuits
• Josephson integrated circuit
• FFT processor
• butterfly processing circuit

詳細情報

• CRID: 1390001204378962688
• NII論文ID: 130004841709
• DOI: 10.1587/transele.e98.c.232
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E98.C/3/E98.C_232/_pdf
• 本文言語コード: en
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