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- SHIMOMURA Yoshio
- MNU Co., Ltd.
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- YAMAMOTO Hiroki
- Graduate School of Engineering, Toyohashi University of Technology
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- USUI Hayato
- DENSO CREATE INC.
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- KOBAYASHI Ryotaro
- Graduate School of Engineering, Toyohashi University of Technology
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- SHIMADA Hajime
- Nagoya University
抄録
Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.
収録刊行物
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- IEICE Transactions on Electronics
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IEICE Transactions on Electronics E98.C (7), 569-579, 2015
一般社団法人 電子情報通信学会
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詳細情報 詳細情報について
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- CRID
- 1390001204378400512
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- NII論文ID
- 130005086131
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- ISSN
- 17451353
- 09168524
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- Crossref
- CiNii Articles
- KAKEN
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- 抄録ライセンスフラグ
- 使用不可