CMOS Majority Circuit with Large Fan-In

  • AKIMA Hisanao
    Research Institute of Electrical Communication, Tohoku University
  • KATAYAMA Yasuhiro
    Toshiba Corporation Semiconductor & Storage Products Company
  • SAKURABA Masao
    Research Institute of Electrical Communication, Tohoku University
  • NAKAJIMA Koji
    Research Institute of Electrical Communication, Tohoku University
  • MADRENAS Jordi
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
  • SATO Shigeo
    Research Institute of Electrical Communication, Tohoku University

抄録

<p>Majority logic is quite important for various applications such as fault tolerant systems, threshold logic, spectrum spread coding, and artificial neural networks. The circuit implementation of majority logic is difficult when the number of inputs becomes large because the number of transistors becomes huge and serious delay would occur. In this paper, we propose a new majority circuit with large fan-in. The circuit is composed of ordinary CMOS transistors and the total number of transistors is approximately only 4N, where N is the total number of inputs. We confirmed a correct operation by using HSPICE simulation. The yield of the proposed circuit was evaluated with respect to N under the variations of device parameters by using Monte Carlo simulation.</p>

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