書誌事項
- タイトル別名
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- Applicable to a Three-phase n-level Inverter Reduction of the General Switching Loss Reduction Method
- サンソウ nレベルインバータ ニ テキヨウ カノウ ナ イッパンテキ ナ スイッチング ソンシツ ノ テイゲンポウ
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抄録
A multi-level inverter has advantages in high blocking voltages and reduced harmonics. However, it needs more complex technical challenges in the utilization of redundant switching vectors as its level is increased.This paper proposes a general space-vector (SV) modulation method for the optimal reduction of the switching losses in three-phase PWM inverter of an arbitrary n-level type. The proposed method consists of two steps. One is the general principle for generation of the SV map for an arbitrary n-level type. The other is the optimal selection of the SV pattern which minimizes the switching losses considering the three-phase currents based on the two-phase modulation method. Simulated examples controlled according to the proposed method are shown for some different levels.
収録刊行物
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- パワーエレクトロニクス学会誌
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パワーエレクトロニクス学会誌 42 (0), 130-136, 2016
パワーエレクトロニクス学会
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詳細情報 詳細情報について
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- CRID
- 1390001205220677248
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- NII論文ID
- 130006070228
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- NII書誌ID
- AA11921199
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- ISSN
- 18843239
- 13488538
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- NDL書誌ID
- 028125961
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- 本文言語コード
- ja
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- データソース種別
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- JaLC
- NDL
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- CiNii Articles
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- 抄録ライセンスフラグ
- 使用不可