Design Study of Domain Decomposition Operation in Dataflow Architecture FDTD/FIT Dedicated Computer

• KAWAGUCHI Hideki

  Muroran Institute of Technology

Abstract

To aim to achieve a high-performance computation for microwave simulations with low cost, small size machine and low energy consumption, a method of the FDTD dedicated computer has been investigated. It was shown by VHDL logical circuit simulations that the FDTD dedicated computer with a dataflow architecture has much higher performance than that of high-end PC and GPU. Then the remaining task of this work is large scale computations by the dedicated computer, since microwave simulations for only 18×18×Z grid space (Z is the number of girds for z direction) can be executed in a single FPGA at most. To treat much larger numerical model size for practical applications, this paper considers an implementation of a domain decomposition method operation of the FDTD dedicated computer in a single FPGA.

Journal

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E101.C (1), 20-25, 2018

  The Institute of Electronics, Information and Communication Engineers

Keywords

• microwave simulation
• FDTD method
• FIT
• dedicated computer
• high-performance computing
• dataflow architecture
• domain-decomposition method

Details

• CRID: 1390001204378592256
• NII Article ID: 130006301151
• DOI: 10.1587/transele.e101.c.20
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E101.C/1/E101.C_20/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed