Low Complexity Log-Likelihood Ratio Calculation Scheme with Bit Shifts and Summations

• AOKI Takayoshi

  Dept. of Electronics and Electrical Engineering, Keio University

• MATSUGI Keita

  Dept. of Electronics and Electrical Engineering, Keio University

• SANADA Yukitoshi

  Dept. of Electronics and Electrical Engineering, Keio University

Abstract

This paper presents an approximated log-likelihood ratio calculation scheme with bit shifts and summations. Our previous work yielded a metric calculation scheme that replaces multiplications with bit shifts and summations in the selection of candidate signal points for joint maximum likelihood detection (MLD). Log-likelihood ratio calculation for turbo decoding generally uses multiplications and by replacing them with bit shifts and summations it is possible to reduce the numbers of logic operations under specific transmission parameters. In this paper, an approximated log-likelihood ratio calculation scheme that substitutes bit shifts and summations for multiplications is proposed. In the proposed scheme, additions are used only for higher-order bits. Numerical results obtained through computer simulation show that this scheme can eliminate multiplications in turbo decoding at the cost of just 0.2dB performance degradation at a BER of 10^-4.

Journal

• IEICE Transactions on Communications

  IEICE Transactions on Communications E101.B (3), 731-739, 2018

  The Institute of Electronics, Information and Communication Engineers

Keywords

• approximated log-likelihood ratio
• turbo decoding

Details

• CRID: 1390001204376906880
• NII Article ID: 130006407184
• DOI: 10.1587/transcom.2017ebp3180
• ISSN: 17451345
• ISSN: 09168516
• Web Site: https://www.jstage.jst.go.jp/article/transcom/E101.B/3/E101.B_2017EBP3180/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
  • KAKEN
• Abstract License Flag: Disallowed