An On-The-Fly Jitter Suppression Technique for Plain-CMOS-Logic-Based Timing Verniers: Dynamic Power Compensation with the Extensions of Digitally Variable Delay Lines

• SHIBATA Nobutaro

  NTT Microsystem Integration Laboratories

• NAKAMURA Mitsuo

  NTT Microsystem Integration Laboratories

抄録

Timing vernier (i.e., digital-to-time converter) is a key component of the pin-electronics circuit board installed in automated digital-VLSI test equipment, and it is used to create fine delays of less than one-cycle time of a clock signal. This paper presents a new on-the-fly (timing-) jitter suppression technique which makes it possible to use low-power plain-CMOS-logic-based timing verniers. Using a power-compensation line installed at the poststage of the digitally variable delay line, we make every pulse (used as a timing signal) consume a fixed amount of electric energy independent of the required delay amount. Since the power load of intrapowerlines is kept constantly, the jitter increase in the situation of changing the required delay amount on the fly is suppressed. On the basis of the concept, a 10-ns span, 125-MHz timing-vernier macro was designed and fabricated with a CMOS process for logic VLSIs. Every macro installed in a real-time timing-signal generator VLSI achieved the required timing resolution of 31.25ps with a linearity error within 15ps. The on-the-fly jitter was successfully suppressed to a random jitter level (<26ps p-p).

収録刊行物

• IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E101.A (8), 1185-1196, 2018-08-01

  一般社団法人 電子情報通信学会

キーワード

• ATE
• delay-locked loop
• digital-to-time converter
• linearity error
• on the fly
• plain CMOS logic
• timing jitter
• timing vernier

詳細情報

• CRID: 1390564238003519616
• NII論文ID: 130007429507
• DOI: 10.1587/transfun.e101.a.1185
• ISSN: 17451337
• ISSN: 09168508
• Web Site: https://www.jstage.jst.go.jp/article/transfun/E101.A/8/E101.A_1185/_pdf
• 本文言語コード: en
• データソース種別:
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  • Crossref
  • CiNii Articles
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