送電線用高速ディジタル電力線搬送における周波数領域等化方式の検討  [in Japanese] Study on Frequency-domain Equalization Scheme for High-speed Digital Power Line Carrier Systems  [in Japanese]

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Abstract

<p>In this paper, we study a minimum mean square error based frequency-domain equalization (MMSE-FDE)scheme for a high-speed digital power line carrier system achieving 1.1 Mbps using 300 kHz bandwidth. Training sequence (TS) inserted single-carrier (SC) block transmission is employed. In the TS-SC block transmission, the Zadoff-Chu sequence is used as TS. TS acts as the cyclic prefix (CP) for MMSE-FDE. The channel estimation and noise power estimation are done using TS for computing the MMSE-FDE weight. In this paper, we design a digital power line carrier system of 210 ksymbol/s, in which the TS length of 64 symbols (Zadoff-Chu sequence) and the data block length of 960 symbols (64QAM) are used for achieving 1.1 Mbps transmission. The transmission performance of the designed digital power line carrier system is evaluated by computer simulation in terms of the normalization mean square error (NMSE) of channel estimation, the mean square error (MSE) of MMSE-FDE, and the bit error rate (BER). It is confirmed that MMSE-FDE is superior to MMSE time-domain equalization (MMSE-TDE) and zero-forcing (ZF) FDE and it achieves the required BER of 1×10<sup>-6</sup> when the received<i> E<sub>b</sub></i>/<i>N</i><sub>0</sub>=25 dB. Furthermore, we clarified the optimum value of forgetting factors of the first order infinite impulse response (IIR) filters used for channel estimation and noise estimation.</p>

Journal

  • IEEJ Transactions on Electronics, Information and Systems

    IEEJ Transactions on Electronics, Information and Systems 138(12), 1529-1538, 2018

    The Institute of Electrical Engineers of Japan

Codes

  • NII Article ID (NAID)
    130007539519
  • NII NACSIS-CAT ID (NCID)
    AN10065950
  • Text Lang
    JPN
  • ISSN
    0385-4221
  • NDL Article ID
    029388723
  • NDL Call No.
    Z16-795
  • Data Source
    NDL  J-STAGE 
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